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CONTEMPORARY ENGINEERING SCIENCES ISSN 1313-6569 (print) ISSN 1314-7641 (online) |
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B. Narendran, R. Parameshwaran Comparison of various optimized architectures of DCO for ADPLL Contemporary Engineering Sciences, Vol. 7, 2014, no. 9, 419-425 http://dx.doi.org/10.12988/ces.2014.4325 Copyright © 2014 B. Narendran and R. Parameshwaran. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. Cited by (2): Masoumeh Souri and Mohammad Bagher Ghaznavi-Ghoushchi, Two Efficient Dual-Band and Wide-Band Low-Power DCO Designs Using Current Starving Gates, DCV and Reconfigurable Schmitt Triggers in 180 nm, Circuits, Systems, and Signal Processing, 35 (2016), no. 5, 1481-1505 [CrossRef] M. Souri and M. B. Ghaznavi-Ghoushchi, A 14.8 ps jitter low-power dual band all digital PLL with reconfigurable DCO and time-interlined multiplexers, Analog Integrated Circuits and Signal Processing, 82 (2015), no. 2, 381-392 [CrossRef]
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