Yu Hiroshima, Shigeyoshi Watanabe
      Impact of FinFET with plural number of channel width using novel one step of trench formation process on pattern design time and works for system LSI
      Contemporary Engineering Sciences, Vol. 11, 2018, no. 101, 5039-5046
      https://doi.org/10.12988/ces.2018.810541

Copyright © 2018 Yu Hiroshima and Shigeyoshi Watanabe. This article is distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.